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In recent years processor IP has become ubiquitous as mobile and consumer device makers have migrated their designs from using stand-alone processor chips to processor cores integrated into more power-efficient System-on-Chips(SoCs). At the same time,software functionality and complexity has increased at a dramatic rate,requiring additional processing bandwidth.Many of today’s processors, including the ARC EM Family of processor IP cores,are focused on delivering increasing levels of performance with lower power consumption and a minimum silicon footprint.

ARC EM processors were f irst introduced in 2012.Designed for ultra-low power operation,EM cores hit a sweet spot in processing efficiency and have since become Synopsys’ most successful processor product line. EM processors are now used in a wide variety of embedded applications, especially where exceptional performance-to-power(DMIPS/mW)or performance-to-area(DMIPS/mm2)ratios are needed such as the Internet of Things(IoT).

The ARC EM family utilizes a scalable 16-/32-bit RISC instruction set architecture(ISA)that is optimized for the unique requirements of embedded and deeply embedded applications, such as performance efficiency and code density.Like all ARC processors,EM cores are highly configurable to enable designers to tailor each ARC processor instance to meet specific performance,power and area requirements.ARC processors are also extendable,allowing designers to add their own custom instructions that accelerate application-specific code.The EM processor cores are supported by a robust ecosystem of software and hardware development tools,including an easy to use and low-cost ARC EM Starter Kit for early software development,the MQX real-time operating system(RTOS),the embARC Open Software Platform,and a broad portfolio of third-party tools,operating systems and middleware from leading industry vendors.

Through the explanations and examples in this book, you will find the ARC EM processors are easy to use and easy to program. The processors are extremely“C-friendly”, meaning there is no need to optimize the applications with assembly.In some aspects,EM processors are easier to use than many 8-bit microcontrollers because of the simplicity of the linear memory architecture,an uncomplicated and yet flexible exception model, comprehensive debug features, and the software infrastructures provided by Synopsys and ecosystem partners.

In 2012,we began expanding Synopsys’engineering development resources in China with a new ARC-focused R&D site in Wuhan,Hubei province. In addition to building the Synopsys team,we sought opportunities to build relationships with local universities and help educate future generations of engineers.The Huazhong University of Science and Technology(HUST)is one such university where a strong bond was formed.HUST is a public,coeducational research university located in Wuhan and is directly affiliated to the Ministry of Education of China.HUST professors and students led the way in working with us to develop a strong microprocessor design and programming curriculum,including coursework and hands-on labs.Our HUST collaborators have also been instrumental in co-authoring with Synopsys this book, which not only serves as a companion text for students taking the ARC-based course but will also serve as a valuable resource to professional software developers,chip design engineers,hobbyists and electronic enthusiasts of all shapes and sizes.

Many thanks to all those people who have contributed to the publication of this book.I hope that you,the reader,find this book helpful for any processor-based project you are undertaking.Design on!

—Yankin Tanurhan,Vice-president of ARC R&D,Synopsys